/*!
* @file     Reg_eSys.h
*
* @version  1.0.0
*
* @brief    Memory map for G32A10xx platform
*
* @attention
*
* Project Name      : AUTOSAR MCAL
*
* Platform          : Arm
*
* Autosar Standard  : Classic Platform 4.4.0
*
* Compiled Version  : G32A10xx_MCAL_1_0_0_01-Otc-25
*
* Copyright (C) 2026 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (Geehy Semiconductor Software License Agreement).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the Geehy Semiconductor Software License Agreement for the governing permissions
* and limitations under the License.
*/

/*
* MISRA-C:2012 compliance checks
*
*     Reg_eSys_h_MISRA_REF1
*         Breaks the required Dir-1.1-C90 of MISRA 2012 guidelines,
*         Any implementation-defined behaviour on which the output of the program depends shall be documented and understood.
*/

#ifndef REG_ESYS_H
#define REG_ESYS_H

/*** @warning Reg_eSys_h_MISRA_REF1 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
#ifdef __cplusplus
extern "C"{
#endif

/*** @warning Reg_eSys_h_MISRA_REF1 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
#include "Platform_Types.h"

/** @addtogroup G32A10xx_StdPeriphDriver
  @{
*/

/** @defgroup PLATFORM_Driver
  * @brief PLATFORM driver modules
  @{
*/

/** @defgroup PLATFORM_Macros
  @{
*/
/*******************************************************************************
                    VENDOR ID & AUTOSAR VERSION INFO
*******************************************************************************/
/** Vendor ID (vendorId) of the dedicated implementation of this module according to the AUTOSAR vendor list. */
#define REG_ESYS_H_VENDOR_ID                     0x00C1U
/** Major version number of AUTOSAR release on which the appropriate implementation is based on. */
#define REG_ESYS_H_AR_RELEASE_MAJOR_VERSION      0x04U
/** Minor version number of AUTOSAR release on which the appropriate implementation is based on. */
#define REG_ESYS_H_AR_RELEASE_MINOR_VERSION      0x04U
/** Revision version number of AUTOSAR release on which the appropriate implementation is based on. */
#define REG_ESYS_H_AR_RELEASE_REVISION_VERSION   0x00U
/** Major version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define REG_ESYS_H_SW_MAJOR_VERSION              0x01U
/** Minor version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define REG_ESYS_H_SW_MINOR_VERSION              0x00U
/** Patch level version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define REG_ESYS_H_SW_PATCH_VERSION              0x00U

/**@} end of group PLATFORM_Macros */

/**************************************************************************
                    VERSION INFOMATION VERIFICATION
**************************************************************************/
/*** @warning Reg_eSys_h_MISRA_REF1 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
#ifdef ENABLE_INTERMODULE_MCAL_CHECK
    /* Make sure the AUTOSAR major version number is the same between Reg_eSys.h and Platform_Types.h */
    #if (REG_ESYS_H_AR_RELEASE_MAJOR_VERSION != PLATFORM_TYPES_H_AR_RELEASE_MAJOR_VERSION)
        #error "AUTOSAR Major Version Number mismatch between Reg_eSys.h and Platform_Types.h"
    #endif
    /* Make sure the AUTOSAR minor version number is the same between Reg_eSys.h and Platform_Types.h */
    #if (REG_ESYS_H_AR_RELEASE_MINOR_VERSION != PLATFORM_TYPES_H_AR_RELEASE_MINOR_VERSION)
        #error "AUTOSAR Minor Version Number mismatch between Reg_eSys.h and Platform_Types.h"
    #endif
#endif

/*******************************************************************************
                    MEMORY MAP FOR G32A PLATFORM
*******************************************************************************/
/** @defgroup PLATFORM_Macros
  @{
*/

/** CAN base address */
#define CAN1_BASEADDR               ((uint32)0x40006400)
#define CAN_ERM_BASEADDR            ((uint32)0x40005800)
#define CAN_SRAM_BASEADDR           ((uint32)0x40005C00)
#define CAN_SRAM_ENDADDR            ((uint32)0x400063FF)

/** USART base address */
#define USART1_BASEADDR             ((uint32)0x40013800)
#define USART2_BASEADDR             ((uint32)0x40004400)

/** ADC base address */
#define ADC1_BASEADDR               ((uint32)0x40012400)

/** SPI base address */
#define SPI1_BASEADDR               ((uint32)0x40013000)

/** GPIO base address */
#define GPIOA_BASEADDR              ((uint32)0x48000000)
#define GPIOB_BASEADDR              ((uint32)0x48000400)
#define GPIOC_BASEADDR              ((uint32)0x48000800)
#define GPIOD_BASEADDR              ((uint32)0x48000C00)
#define GPIOF_BASEADDR              ((uint32)0x48001400)

/** FMC base address */
#define FMC_BASEADDR                ((uint32)0x40022000)
#define FMC_OPT_BASEADDR            ((uint32)0x1FFFF800)

/** RCM base address */
#define RCM_BASEADDR                ((uint32)0x40021000)

/** PMU base address */
#define PMU_BASEADDR                ((uint32)0x40007000)

/** EINT base address */
#define EINT_BASEADDR               ((uint32)0x40010400)

/** DBGMCU base address */
#define DBGMCU_BASEADDR             ((uint32)0x40015800)

/** TMR base address */
#define TMR1_BASEADDR               ((uint32)0x40012C00)
#define TMR2_BASEADDR               ((uint32)0x40000000)
#define TMR3_BASEADDR               ((uint32)0x40000400)
#define TMR4_BASEADDR               ((uint32)0x40002000)
#define TMR6_BASEADDR               ((uint32)0x40001000)
#define TMR7_BASEADDR               ((uint32)0x40014000)
#define TMR8_BASEADDR               ((uint32)0x40014400)

/** IWDT_BASEADDR (Independent Watchdog) base address */
#define IWDT0_BASEADDR               ((uint32)0x40003000)

/** CRC base address */
#define CRC_BASEADDR                ((uint32)0x40023000)

/** AES base address */
#define AES_BASEADDR                ((uint32)0x40026000)

/** SHA256 base address */
#define SHA256_BASEADDR             ((uint32)0x40026400)

/** RNG base address */
#define TRNG_BASEADDR               ((uint32)0x40026800)

/** UID base address */
#define UID_BASEADDR                ((uint32)0x1FFFF440)

/** DMA base address */
#define DMA_BASEADDR                ((uint32)0x40020000)

/** SMS (Static Memory Subsystem) base address */
#define SMS_BASEADDR                ((uint32)0x40005400)

/** SYSCFG base address */
#define SYSCFG_BASEADDR             ((uint32)0x40010000)

/** RTC base address */
#define RTC_BASEADDR                ((uint32)0x40002800)

/**@} end of group PLATFORM_Macros */

/*** @warning Reg_eSys_h_MISRA_REF1 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
#ifdef __cplusplus
}
#endif

#endif

/**@} end of group PLATFORM_Driver */
/**@} end of group G32A10xx_StdPeriphDriver */
