/*!
* @file     Crc_Reg.h
*
* @version  1.0.0
*
* @brief    The header of the register definitions of the CRC module
*
* @attention
*
* Project Name      : AUTOSAR MCAL
*
* Platform          : Arm
*
* Autosar Standard  : Classic Platform 4.4.0
*
* Compiled Version  : G32A10xx_MCAL_1_0_0_01-Otc-25
*
* Copyright (C) 2026 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (Geehy Semiconductor Software License Agreement).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the Geehy Semiconductor Software License Agreement for the governing permissions
* and limitations under the License.
*/

#ifndef CRC_REG_H
#define CRC_REG_H

#ifdef __cplusplus
extern "C"{
#endif

#include "Reg_eSys.h"

/** @addtogroup G32A10xx_StdPeriphDriver
  @{
*/

/** @defgroup CRC_Driver
  * @brief CRC driver modules
  @{
*/

/** @defgroup CRC_Macros
  @{
*/
/***********************************************************************************************************
                                    VENDOR ID & AUTOSAR VERSION INFO
************************************************************************************************************/
/** Vendor ID (vendorId) of the dedicated implementation of this module according to the AUTOSAR vendor list. */
#define CRC_REG_H_VENDOR_ID                               0x00C1U
/** Major version number of AUTOSAR release on which the appropriate implementation is based on. */
#define CRC_REG_H_AR_RELEASE_MAJOR_VERSION                0x04U
/** Minor version number of AUTOSAR release on which the appropriate implementation is based on. */
#define CRC_REG_H_AR_RELEASE_MINOR_VERSION                0x04U
/** Revision version number of AUTOSAR release on which the appropriate implementation is based on. */
#define CRC_REG_H_AR_RELEASE_REVISION_VERSION             0x00U
/** Major version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define CRC_REG_H_SW_MAJOR_VERSION                        0x01U
/** Minor version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define CRC_REG_H_SW_MINOR_VERSION                        0x00U
/** Patch level version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define CRC_REG_H_SW_PATCH_VERSION                        0x00U

/**@} end of group CRC_Macros */

/***********************************************************************************************************
                                      VERSION INFOMATION VERIFICATION
************************************************************************************************************/
#ifdef ENABLE_INTERMODULE_MCAL_CHECK
    /* Make sure the AUTOSAR major version number is the same between Crc_Reg.h and Reg_eSys.h */
    #if (CRC_REG_H_AR_RELEASE_MAJOR_VERSION != REG_ESYS_H_AR_RELEASE_MAJOR_VERSION)
        #error "AUTOSAR Major Version Number mismatch between Crc_Reg.h and Reg_eSys.h"
    #endif
    /* Make sure the AUTOSAR minor version number is the same between Crc_Reg.h and Reg_eSys.h */
    #if (CRC_REG_H_AR_RELEASE_MINOR_VERSION != REG_ESYS_H_AR_RELEASE_MINOR_VERSION)
        #error "AUTOSAR Minor Version Number mismatch between Crc_Reg.h and Reg_eSys.h"
    #endif
#endif

/** @defgroup CRC_Macros
  @{
*/
/***********************************************************************************************************
        BIT MASK AND OFFSET FOR REGISTER: CRC_DATA (Base + 0x00)
************************************************************************************************************/
#define CRC_DATA_REG_ADDR                   ((uint32)(CRC_BASEADDR + (uint32)0U))

#define CRC_DATA_DATA_MASK                  ((uint32)0xFFFFFFFFU)
#define CRC_DATA_DATA_SHIFT                 ((uint8)0U)

/***********************************************************************************************************
        BIT MASK AND OFFSET FOR REGISTER: CRC_INDATA (Base + 0x04)
************************************************************************************************************/
#define CRC_INDATA_REG_ADDR                 ((uint32)(CRC_BASEADDR + (uint32)0x04U))

#define CRC_INDATA_INDATA_MASK              ((uint32)0x000000FFU)
#define CRC_INDATA_INDATA_SHIFT             ((uint8)0U)

/***********************************************************************************************************
        BIT MASK AND OFFSET FOR REGISTER: CRC_CTRL (Base + 0x08)
************************************************************************************************************/
#define CRC_CTRL_REG_ADDR                   ((uint32)(CRC_BASEADDR + (uint32)0x08U))

#define CRC_CTRL_RST_MASK                   ((uint32)0x00000001U)
#define CRC_CTRL_RST_SHIFT                  ((uint8)0U)

#define CRC_CTRL_REVI_MASK                  ((uint32)0x00000060U)
#define CRC_CTRL_REVI_SHIFT                 ((uint8)5U)

#define CRC_CTRL_REVO_MASK                  ((uint32)0x00000080U)
#define CRC_CTRL_REVO_SHIFT                 ((uint8)7U)

/***********************************************************************************************************
        BIT MASK AND OFFSET FOR REGISTER: CRC_INITVAL (Base + 0x10)
************************************************************************************************************/
#define CRC_INITVAL_REG_ADDR                ((uint32)(CRC_BASEADDR + (uint32)0x10U))

#define CRC_INITVAL_VALUE_MASK              ((uint32)0xFFFFFFFFU)
#define CRC_INITVAL_VALUE_SHIFT             ((uint8)0U)

/**@} end of group CRC_Macros */

#ifdef __cplusplus
}
#endif

#endif

/**@} end of group CRC_Driver */
/**@} end of group G32A10xx_StdPeriphDriver */
