/*!
* @file     Mcu_PBcfg.c
*
* @version  1.0.0
*
* @brief    This source file includes the configuration parameters of the Mcu module.
*
*/

/*******************************************************************************
 * Project Name      : AUTOSAR MCAL
 * Platform          : Arm
 * Autosar Standard  : Classic Platform 4.4.0
 * Revision Number   :
 * Compiled Version  : G32A10xx_MCAL_1_0_0_15-Nov-25
 *
 * Copyright (C) 2026 Geehy Semiconductor
 *
 * You may not use this file except in compliance with the GEEHY COPYRIGHT NOTICE
 * (Geehy Semiconductor Software License Agreement).
 *
 * The program is only for reference, which is distributed in the hope that it
 * will be useful and instructional for customers to develop their software.
 * Unless required by applicable law or agreed to in writing, the program is
 * distributed on an "AS IS" BASIS, WITHOUT ANY WARRANTY OR CONDITIONS OF ANY
 * KIND, either express or implied. See the Geehy Semiconductor Software License Agreement for
 * the governing permissions and limitations under the License.
*
*******************************************************************************/

#ifdef __cplusplus
extern "C"{
#endif  /* ifdef __cplusplus */

#include "Mcu_Cfg.h"
#include "Mcu.h"
/*******************************************************************************
                    VENDOR ID & AUTOSAR VERSION INFO
*******************************************************************************/
/** Vendor ID (vendorId) of the dedicated implementation of this module according to the AUTOSAR vendor list. */
#define MCU_PBCFG_VENDOR_ID                              0x00C1U
/** Major version number of AUTOSAR release on which the appropriate implementation is based on. */
#define MCU_PBCFG_AR_RELEASE_MAJOR_VERSION               0x04U
/** Minor version number of AUTOSAR release on which the appropriate implementation is based on. */
#define MCU_PBCFG_AR_RELEASE_MINOR_VERSION               0x04U
/** Revision version number of AUTOSAR release on which the appropriate implementation is based on. */
#define MCU_PBCFG_AR_RELEASE_REVISION_VERSION            0x00U
/** Major version number of the vendor specific implementation of the module. The numbering is vendor specific. */ 
#define MCU_PBCFG_SW_MAJOR_VERSION                       0x01U
/** Minor version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define MCU_PBCFG_SW_MINOR_VERSION                       0x00U
/** Patch level version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define MCU_PBCFG_SW_PATCH_VERSION                       0x00U

/*******************************************************************************
                             VERSION CHECK
*******************************************************************************/


/*******************************************************************************
                             GLOBAL VARIABLE
*******************************************************************************/
#define MCU_START_SEC_CONFIG_DATA_UNSPECIFIED
#include "Mcu_MemMap.h"

#if (MCU_INITCLK_ENABLED == STD_ON)
static const Mcu_Rcm_ModuleClkCfgType g_mcuModuleConfig_0[MCU_RCM_REGISTERS_CONUT] = 
{
    {DMA1_MODULE, CLK_ENABLE},
    {SRAM_MODULE, CLK_ENABLE},
    {FMC_MODULE, CLK_ENABLE},
    {CRC_MODULE, CLK_DISABLE},
    {RNG_MODULE, CLK_DISABLE},
    {SHA_MODULE, CLK_DISABLE},
    {AES_MODULE, CLK_DISABLE},
    {GPIOA_MODULE, CLK_ENABLE},
    {GPIOB_MODULE, CLK_ENABLE},
    {GPIOC_MODULE, CLK_DISABLE},
    {GPIOD_MODULE, CLK_DISABLE},
    {GPIOF_MODULE, CLK_DISABLE},
    
    {SYSCFG_MODULE, CLK_ENABLE},
    {ADC_MODULE, CLK_DISABLE},
    {TMR1_MODULE, CLK_DISABLE},
    {SPI_MODULE, CLK_DISABLE},
    {USART1_MODULE, CLK_ENABLE},
    {TMR8_MODULE, CLK_DISABLE},
    {DBGMCU_MODULE, CLK_DISABLE},
    {SERM_MODULE, CLK_ENABLE},
    
    {TMR2_MODULE, CLK_DISABLE},
    {TMR3_MODULE, CLK_DISABLE},
    {TMR4_MODULE, CLK_DISABLE},
    {TMR6_MODULE, CLK_DISABLE},
    {TMR7_MODULE, CLK_DISABLE},
    {USART2_MODULE, CLK_ENABLE},
    {FDCAN_MODULE, CLK_DISABLE},
    {PMU_MODULE, CLK_DISABLE},
};
#endif

/*******************************************************************************
                             PMU MODULE CONFIG
*******************************************************************************/
static const Mcu_Pmu_CfgType g_mcuPmuConfig =
{
    .rtcEnable = DISABLE,
    .powerEnable = DISABLE,
    .pvdSelect = PVD_2_691V,
    .mcuLvdNotification = NULL_PTR,
    .PVDHigh = DISABLE,
};

/*******************************************************************************
                             RCM MODULE CONFIG
*******************************************************************************/
static const Mcu_Rcm_ConfigType g_mcuRcmConfig =
{
    .clockSource = PLLCLK_CLK,
    .hsiClockCfg = 
    {
        .enableHsiClock = CLK_ENABLE,
        .hsiTrim = 16,
    },
    .hseClockCfg = 
    {
        .enableHseClock = CLK_ENABLE,
    },
    .pllClockCfg = 
    {
        .enablePllClock = CLK_ENABLE,
        .pllSelect = RCM_PLL_SEL_HSE,
        .pllMf = RCM_PLLMF_4,
        .pllDiv = RCM_CLK_DIV_1,
    },
};

/*******************************************************************************
                             SYSC MODULE CONFIG
*******************************************************************************/
static const Mcu_Sysc_dmaTypes g_dmaRmpCfg_0[MCU_SYSC_DMARMP_CONUT] = 
{
    {SYSCFG_DAM_REMAP_ADC, REMAP_DISABLE},
    {SYSCFG_DAM_REMAP_USART1TX, REMAP_DISABLE},
    {SYSCFG_DAM_REMAP_USART1RX, REMAP_DISABLE},
    {SYSCFG_DAM_REMAP_TMR4CH3, REMAP_DISABLE},
    {SYSCFG_DAM_REMAP_TMR4UP, REMAP_DISABLE},
};


static const Mcu_Sysc_EnitCfgTypes g_enitCfg_0[MCU_SYSC_ENIT_CONUT] = 
{
    {SYSCFG_PIN_0, SYSCFG_PORT_RETAIN},
    {SYSCFG_PIN_1, SYSCFG_PORT_RETAIN},
    {SYSCFG_PIN_2, SYSCFG_PORT_RETAIN},
    {SYSCFG_PIN_3, SYSCFG_PORT_RETAIN},
    
    {SYSCFG_PIN_4, SYSCFG_PORT_RETAIN},
    {SYSCFG_PIN_5, SYSCFG_PORT_RETAIN},
    {SYSCFG_PIN_6, SYSCFG_PORT_RETAIN},
    {SYSCFG_PIN_7, SYSCFG_PORT_RETAIN},
    
    {SYSCFG_PIN_8, SYSCFG_PORT_GPIOB},
    {SYSCFG_PIN_9, SYSCFG_PORT_GPIOC},
    {SYSCFG_PIN_10, SYSCFG_PORT_GPIOD},
    {SYSCFG_PIN_11, SYSCFG_PORT_GPIOF},
    
    {SYSCFG_PIN_12, SYSCFG_PORT_GPIOB},
    {SYSCFG_PIN_13, SYSCFG_PORT_GPIOC},
    {SYSCFG_PIN_14, SYSCFG_PORT_GPIOD},
    {SYSCFG_PIN_15, SYSCFG_PORT_GPIOF},
};


static const Mcu_Sysc_CfgTypes g_mcuSyscConfig =
{
    .memSel = SYSCFG_MEMORY_REMAP_SYSTEM,
    .dmaRmpCfg = g_dmaRmpCfg_0,
    .enitCfg = g_enitCfg_0,
    .lock = SYSCFG_PVDLOCK,
};

/*******************************************************************************
                             DBGMCU MODULE CONFIG
*******************************************************************************/
static const Mcu_DbgMcu_WorkStatusCfgTypes g_dbgMcuCfg_0[MCU_DBGMCU_MODE_CONUT] = 
{
    {DBG_APB1_PER_TMR2, DISABLE},
    {DBG_APB1_PER_TMR3, DISABLE},
    {DBG_APB1_PER_TMR6, DISABLE},
    {DBG_APB1_PER_TMR4, DISABLE},
    {DBG_APB1_PER_RTC,  DISABLE},
    {DBG_APB1_PER_IWDT, DISABLE},
    
    {DBG_APB2_PER_TMR1, DISABLE},
    {DBG_APB2_PER_TMR7, DISABLE},
    {DBG_APB2_PER_TMR8, DISABLE}
};

static const Mcu_DbgMcu_CfgTypes g_mcuDbgmcuConfig =
{
    .stopEnable = DISABLE,
    .standbyEnable = DISABLE,
    .work = g_dbgMcuCfg_0
};

/*******************************************************************************
                             MCU CLOCK CONFIG
*******************************************************************************/
#if (MCU_INITCLK_ENABLED == STD_ON)
const Mcu_Rcm_SysClockCfgType g_mcuClockConfig[MCU_MAX_CLK_CONFIGS_COUNT] = 
{
    {
        .clockNum = 1,
        
        .AHBDiv = RCM_SYSCLK_DIV_1,
        .APBDiv = RCM_HCLK_DIV_1,
        
        .moduleConfig = g_mcuModuleConfig_0,
        
        .hsi14ClkCfg = 
        {
            .enableHsi14Clock = CLK_DISABLE,
            .hsi14Trim = 16,
        },
        
        .enableHsi14ADC = CLK_DISABLE,
        
        .lsiEnable = CLK_DISABLE,
        
        .usart1ClkSele = RCM_USARTCLK_PCLK,
        .usart2ClkSele = RCM_USARTCLK_PCLK,
        .canFdClkSele = RCM_CANCLK_HSE,
       
        .CCSEnable = CLK_DISABLE,
        
        .rtcCfg = 
        {
            .enable = CLK_DISABLE,
            .rtcClk = RCM_RTCCLK_NONE,
        },
    },
};
#endif

const Mcu_ConfigType g_mcuConfig = 
{
    .mcuPmuCfg = &g_mcuPmuConfig,
    .mcuSyscCfg = &g_mcuSyscConfig,
    .mcuRcmCfg = &g_mcuRcmConfig,
    .mcuDbgMcuCfg = &g_mcuDbgmcuConfig,
    .Mcu_RamCfg = NULL_PTR,
#if (MCU_INITCLK_ENABLED == STD_ON)
    .Mcu_ClockCfg = &g_mcuClockConfig,
#endif
};


#define MCU_STOP_SEC_CONFIG_DATA_UNSPECIFIED
#include "Mcu_MemMap.h"

#ifdef __cplusplus
}
#endif  /* ifdef __cplusplus */

