/*!
* @file     Ocu_Tmr.h
*
* @version  1.0.0
*
* @brief    The header of TMR driver interface.
*           This header file includes the TMR driver interface of the Ocu moudle.
* @attention
*
* Project Name      : AUTOSAR MCAL
*
* Platform          : Arm
*
* Autosar Standard  : Classic Platform 4.4.0
*
* Compiled Version  : G32A10xx_MCAL_1_0_0_15-Nov-2
*
* Copyright (C) 2026 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (Geehy Semiconductor Software License Agreement).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the Geehy Semiconductor Software License Agreement for the governing permissions
* and limitations under the License.
*/

#ifndef OCU_TMR_H
#define OCU_TMR_H

#ifdef __cplusplus
extern "C"{
#endif  /* ifdef __cplusplus */

#include "Ocu_Tmr_Types.h"
#include "Ocu_Ipw_Types.h"
/** @addtogroup G32A10xx_StdPeriphDriver
  @{
*/

/** @defgroup OCU_Driver
  * @brief OCU driver modules
  @{
*/

/** @defgroup OCU_Macros
  @{
*/
/***********************************************************************************************************************
                                    VENDOR ID & AUTOSAR VERSION INFO
***********************************************************************************************************************/
/** Vendor ID (vendorId) of the dedicated implementation of this module according to the AUTOSAR vendor list. */
#define OCU_TMR_H_VENDOR_ID                               0x00C1U
/** Major version number of AUTOSAR release on which the appropriate implementation is based on. */ 
#define OCU_TMR_H_AR_RELEASE_MAJOR_VERSION                0x04U
/** Minor version number of AUTOSAR release on which the appropriate implementation is based on. */
#define OCU_TMR_H_AR_RELEASE_MINOR_VERSION                0x04U
/** Revision version number of AUTOSAR release on which the appropriate implementation is based on. */
#define OCU_TMR_H_AR_RELEASE_REVISION_VERSION             0x00U
/** Major version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define OCU_TMR_H_SW_MAJOR_VERSION                        0x01U
/** Minor version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define OCU_TMR_H_SW_MINOR_VERSION                        0x00U
/** Patch level version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define OCU_TMR_H_SW_PATCH_VERSION                        0x00U

/***********************************************************************************************************
                                  VERSION INFOMATION VERIFICATION
*************************************************************************************************************/
/* Make sure the vendor ids are the same between Ocu_Tmr.h and Ocu_Tmr_Types.h */
#if (OCU_TMR_H_VENDOR_ID != OCU_TMR_TYPES_H_VENDOR_ID)
    #error "Vendor ids mismatch between Ocu_Tmr.h and Ocu_Tmr_Types.h"
#endif  /* {if (OCU_TMR_H_VENDOR_ID != OCU_TMR_TYPES_H_VENDOR_ID)} */

/* Make sure the AUTOSAR major version number is the same between Ocu_Tmr.h and Ocu_Tmr_Types.h */
#if (OCU_TMR_H_AR_RELEASE_MAJOR_VERSION != OCU_TMR_TYPES_H_AR_RELEASE_MAJOR_VERSION)
    #error "AUTOSAR Major Version Number mismatch between Ocu_Tmr.h and Ocu_Tmr_Types.h"
#endif
/* Make sure the AUTOSAR minor version number is the same between Ocu_Tmr.h and Ocu_Tmr_Types.h */
#if (OCU_TMR_H_AR_RELEASE_MINOR_VERSION != OCU_TMR_TYPES_H_AR_RELEASE_MINOR_VERSION)
    #error "AUTOSAR Minor Version Number mismatch between Ocu_Tmr.h and Ocu_Tmr_Types.h"
#endif
/* Make sure the AUTOSAR revision version number is the same between Ocu_Tmr.h and Ocu_Tmr_Types.h */
#if (OCU_TMR_H_AR_RELEASE_REVISION_VERSION !=  OCU_TMR_TYPES_H_AR_RELEASE_REVISION_VERSION)
    #error "AUTOSAR Revision Version Number mismatch between Ocu_Tmr.h and Ocu_Tmr_Types.h"
#endif

/* Make sure the software major version number is the same between Ocu_Tmr.h and Ocu_Tmr_Types.h */
#if (OCU_TMR_H_SW_MAJOR_VERSION != OCU_TMR_TYPES_H_SW_MAJOR_VERSION)
    #error "Software Major Version Number mismatch between Ocu_Tmr.h and Ocu_Tmr_Types.h"
#endif
/* Make sure the software minor version number is the same between Ocu_Tmr.h and Ocu_Tmr_Types.h */
#if (OCU_TMR_H_SW_MINOR_VERSION != OCU_TMR_TYPES_H_SW_MINOR_VERSION)
    #error "Software Minor Version Number mismatch between Ocu_Tmr.h and Ocu_Tmr_Types.h"
#endif
/* Make sure the software patch version number is the same between Ocu_Tmr.h and Ocu_Tmr_Types.h */
#if (OCU_TMR_H_SW_PATCH_VERSION != OCU_TMR_TYPES_H_SW_PATCH_VERSION)
    #error "Software Patch Version Number mismatch between Ocu_Tmr.h and Ocu_Tmr_Types.h"
#endif
/***********************************************************************************************************
                                            MACRO DEFINITION
************************************************************************************************************/
#define OCU_TMR_OUTPIN_USED_SHIFT_BITS      ((uint8)(0U))
#define OCU_TMR_OUTPIN_USED_MASK_BITS       ((uint8)(BIT0))

#define OCU_TMR_CSTS_PWMOENCH_SHIFT_BITS    ((uint8)(0x10U))

#define OCU_TMR_DBG_INFO_SHIFT_BITS         ((uint8)(0x05U))

#define OCU_TMR_CLOCK_SOURCE_SHIFT_BITS     ((uint8)(0U))
#define OCU_TMR_CLOCK_SOURCE_MASK_BITS      ((uint8)(BIT0|BIT1))

#define OCU_TMR_PIN_STATE_SHIFT_BITS        ((uint8)(0x01U))
#define OCU_TMR_PIN_STATE_MASK_BITS         ((uint8)(BIT1))

#define OCU_TMR_CLOCK_DIV_SHIFT_BITS        ((uint8)(0x02U))
#define OCU_TMR_CLOCK_DIV_MASK_BITS         ((uint8)(BIT2|BIT3|BIT4))

/** Disable the Ocu Tmr output */
#define OCU_TMR_OUTPUT_DISABLED             ((uint8)(0U))

#define OCU_TMR_PIN_ACTION_SHIFT_BITS       ((uint8)(0x02U))
#define OCU_TMR_PIN_ACTION_MASK_BITS        ((uint8)(BIT2|BIT3))

#define OCU_TMR_CHANNEL1_PIN_ACTION_SHIFT_BITS       ((uint8)(0x04U))
#define OCU_TMR_CHANNEL1_PIN_ACTION_MASK_BITS        ((uint8)(BIT4|BIT5|BIT6))

#define OCU_TMR_CHANNEL2_PIN_ACTION_SHIFT_BITS       ((uint8)(0x0CU))
#define OCU_TMR_CHANNEL2_PIN_ACTION_MASK_BITS        ((uint16)(BIT12|BIT13|BIT14))

#define OCU_TMR_CHANNEL3_PIN_ACTION_SHIFT_BITS       ((uint8)(0x04U))
#define OCU_TMR_CHANNEL3_PIN_ACTION_MASK_BITS        ((uint8)(BIT4|BIT5|BIT6))

#define OCU_TMR_CHANNEL4_PIN_ACTION_SHIFT_BITS       ((uint8)(0x0CU))
#define OCU_TMR_CHANNEL4_PIN_ACTION_MASK_BITS        ((uint16)(BIT12|BIT13|BIT14))

#define TMR_CHANNEL_SHIFT_VAL          ((uint8)0U)
#define TMR_CHANNEL_MASK_BITS          ((uint8)0x3U)

#define TMR_MODULE_SHIFT_VAL           ((uint8)2U)
#define TMR_MODULE_MASK_BITS           ((uint8)0x3CU)

/** The Tmr channel and fault index */
#define TMR_CH_FLT_INDEX(ModInex, ChIndex)   ((uint8)((uint8)(ModInex << TMR_MODULE_SHIFT_VAL) + (ChIndex))) 

/** The channel1 of the TMR1  */
#define TMR1_CH1    (TMR_CH_FLT_INDEX(1U, 0U))
/** The channel2 of the TMR1  */
#define TMR1_CH2    (TMR_CH_FLT_INDEX(1U, 1U))
/** The channel3 of the TMR1  */
#define TMR1_CH3    (TMR_CH_FLT_INDEX(1U, 2U))
/** The channel4 of the TMR1  */
#define TMR1_CH4    (TMR_CH_FLT_INDEX(1U, 3U))

/** The channel1 of the TMR2  */
#define TMR2_CH1    (TMR_CH_FLT_INDEX(2U, 0U))
/** The channel2 of the TMR2  */
#define TMR2_CH2    (TMR_CH_FLT_INDEX(2U, 1U))
/** The channel3 of the TMR2  */
#define TMR2_CH3    (TMR_CH_FLT_INDEX(2U, 2U))
/** The channel4 of the TMR2  */
#define TMR2_CH4    (TMR_CH_FLT_INDEX(2U, 3U))

/** The channel1 of the TMR3  */
#define TMR3_CH1    (TMR_CH_FLT_INDEX(3U, 0U))
/** The channel2 of the TMR3  */
#define TMR3_CH2    (TMR_CH_FLT_INDEX(3U, 1U))
/** The channel3 of the TMR3  */
#define TMR3_CH3    (TMR_CH_FLT_INDEX(3U, 2U))
/** The channel4 of the TMR3  */
#define TMR3_CH4    (TMR_CH_FLT_INDEX(3U, 3U))

/** The channel1 of the TMR4  */
#define TMR4_CH1    (TMR_CH_FLT_INDEX(4U, 0U))
/** The channel2 of the TMR4  */
#define TMR4_CH2    (TMR_CH_FLT_INDEX(4U, 1U))
/** The channel3 of the TMR4  */
#define TMR4_CH3    (TMR_CH_FLT_INDEX(4U, 2U))
/** The channel4 of the TMR4  */
#define TMR4_CH4    (TMR_CH_FLT_INDEX(4U, 3U))

#define OCU_TMR_CTRL1_CLKDIV_DIV1              ((uint32)(0U))
#define OCU_TMR_CTRL1_CLKDIV_DIV2              ((uint32)(0x01U))
#define OCU_TMR_CTRL1_CLKDIV_DIV4              ((uint32)(0x02U))
/**@} end of group OCU_Macros */
/***********************************************************************************************************
                                        FUNCTION DECLARATION
************************************************************************************************************/
/** @defgroup OCU_Fuctions
  @{
*/
#define OCU_START_SEC_CODE
#include "Ocu_MemMap.h"

FUNC(void, OCU_CODE) Ocu_Tmr_HwInit(CONSTP2CONST(Ocu_TmrHwConfigType, AUTOMATIC, OCU_APPL_CONST)  OcuTmrIpConfigPtr);

#if (STD_ON == OCU_SET_PIN_ACTION_API)
FUNC(void, OCU_CODE) Ocu_Tmr_HwSetPinAct(CONST(uint8, AUTOMATIC) ChannelIndex, \
    VAR(Ocu_PinActionType, AUTOMATIC) OcuPinActionType, \
    VAR(boolean, AUTOMATIC) ChannelIsRunning, \
    CONSTP2CONST(Ocu_TmrHwConfigType, OCU_CONST, OCU_APPL_CONST) OcuTmrIpConfigPtr);
#endif  /* {if (STD_ON == OCU_SET_PIN_ACTION_API)} */

FUNC(void, OCU_CODE) Ocu_Tmr_HwStartCh(CONST(uint8, AUTOMATIC) ChannelIndex, \
    CONSTP2CONST(Ocu_TmrHwConfigType, OCU_CONST, OCU_APPL_CONST) OcuTmrIpConfigPtr);

#if (STD_ON == OCU_SET_ABSOLUTE_THRESHOLD_API)
FUNC(Ocu_ReturnType, OCU_CODE) Ocu_Tmr_SetAbsThrd(CONST(uint8, AUTOMATIC) ChannelIndex, \
    VAR(Ocu_ValueType, AUTOMATIC) ReferenceCompareValue, \
    VAR(Ocu_ValueType, AUTOMATIC) AbsoluteCompareValue, \
    CONSTP2CONST(Ocu_TmrHwConfigType, OCU_CONST, OCU_APPL_CONST) OcuTmrIpConfigPtr);
#endif  /* {if (STD_ON == OCU_SET_ABSOLUTE_THRESHOLD_API)} */

#if (STD_ON == OCU_SET_RELATIVE_THRESHOLD_API)
FUNC(Ocu_ReturnType, OCU_CODE) Ocu_Tmr_HwSetRelThrd(CONST(uint8, AUTOMATIC) ChannelIndex, \
    VAR(Ocu_ValueType, AUTOMATIC)  RelativeCompareValue, \
    CONSTP2CONST(Ocu_TmrHwConfigType, OCU_CONST, OCU_APPL_CONST) OcuTmrIpConfigPtr);
#endif  /* {if (STD_ON == OCU_SET_RELATIVE_THRESHOLD_API)} */

#if (STD_ON == OCU_SET_PIN_STATE_API)
FUNC(void, OCU_CODE) Ocu_Tmr_HwSetPinState(CONST(uint8, AUTOMATIC) ChannelIndex, \
    CONST(Ocu_PinStateType, AUTOMATIC) OcuPinStateType, \
    CONSTP2CONST(Ocu_TmrHwConfigType, OCU_CONST, OCU_APPL_CONST) OcuTmrIpConfigPtr);
#endif  /* {if (STD_ON == OCU_SET_PIN_STATE_API)} */

#if (STD_ON == OCU_GET_COUNTER_API)
FUNC(uint16, OCU_CODE) Ocu_Tmr_HwGetCnt(CONST(uint8, AUTOMATIC) ChannelIndex, \
    CONSTP2CONST(Ocu_TmrHwConfigType, OCU_CONST, OCU_APPL_CONST) OcuTmrIpConfigPtr);
#endif  /* STD_ON == OCU_GET_COUNTER_API */

#if (STD_ON == OCU_SET_CLOCK_MODE_API_ENABLE)
FUNC(void, OCU_CODE) Ocu_Tmr_HwSetClkPsc(CONSTP2CONST(Ocu_TmrHwConfigType, AUTOMATIC, OCU_APPL_CONST) OcuTmrIpConfigPtr, \
    VAR(Ocu_TmrPrescalerType, AUTOMATIC) OcuTmrPrescalerType);
#endif  /* {if (STD_ON == OCU_SET_CLOCK_MODE_API_ENABLE)} */

#if ((STD_ON == OCU_SET_RELATIVE_THRESHOLD_API) || (STD_ON == OCU_SET_ABSOLUTE_THRESHOLD_API))
FUNC (Ocu_ValueType, OCU_CODE) Ocu_Tmr_GetMaxCntVal(VAR(Ocu_ChannelType, AUTOMATIC) ChannelConfigIndex);
#endif  /* {if ((STD_ON == OCU_SET_RELATIVE_THRESHOLD_API) || (STD_ON == OCU_SET_ABSOLUTE_THRESHOLD_API))} */

#if (STD_ON == OCU_NOTIFICATION_EN)
/** The Ocu Tmr module interrupt callback function  */
FUNC(void, OCU_CODE) Ocu_Tmr_HandleInt(CONST(uint8, AUTOMATIC) OcuTmrChannel);
#endif  /* {if (STD_ON == OCU_NOTIFICATION_EN)} */

FUNC(void, OCU_CODE) Ocu_Tmr_StopChannel(CONST(uint8, AUTOMATIC) ChannelIndex, \
    CONSTP2CONST(Ocu_TmrHwConfigType, OCU_CONST, OCU_APPL_CONST) OcuTmrIpConfigPtr);

#if (STD_ON == OCU_DEINIT_API_ENABLE)
FUNC(void, OCU_CODE) Ocu_Tmr_HwDeInit(CONSTP2CONST(Ocu_TmrHwConfigType, AUTOMATIC, OCU_APPL_CONST) OcuTmrIpConfigPtr);
#endif  /* {if (STD_ON == OCU_DEINIT_API_ENABLE)} */

FUNC(void, ICU_CODE) Ocu_Tmr_ProcessInterrupt(CONST(Ocu_TmrModuleType, AUTOMATIC) tmrModule);

#define OCU_STOP_SEC_CODE
#include "Ocu_MemMap.h"

/**@} end of group OCU_Fuctions */
#ifdef __cplusplus
}
#endif  /* ifdef __cplusplus */

#endif /* OCU_TMR_H */
/**@} end of group OCU_Driver */
/**@} end of group G32A10xx_StdPeriphDriver */
