/*!
* @file     Pdl_TmrIrq.c
*
* @version  1.0.0
*
* @brief    The source file of the TMR driver.
*           This source file contains the API specification and other variables of the TMR driver.
* @attention
*
* Project Name      : AUTOSAR MCAL
*
* Platform          : Arm
*
* Autosar Standard  : Classic Platform 4.4.0
*
* Compiled Version  : G32A10xx_MCAL_1_0_0_01-Otc-25
*
* Copyright (C) 2026 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (Geehy Semiconductor Software License Agreement).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the Geehy Semiconductor Software License Agreement for the governing permissions
* and limitations under the License.
*/

#ifdef __cplusplus
extern "C"{
#endif  /* ifdef __cplusplus */

#include "modules.h"
#include "Reg_eSys.h"
#include "Pdl_TmrReg.h"

#if (STD_ON == ICU_MODULE_ENABLE)
#include "Icu_Tmr.h"
#endif
    
#if (STD_ON == GPT_MODULE_ENABLE)
#include "Gpt_Tmr.h"
#endif

#if (STD_ON == OCU_MODULE_ENABLE)
#include "Ocu_Tmr.h"
#endif

#if (STD_ON == PWM_MODULE_ENABLE)
#include "Pwm_Tmr.h"
#endif
/** @addtogroup G32A10xx_StdPeriphDriver
  @{
*/

/** @defgroup PDL_Driver
  * @brief PDL driver modules
  @{
*/

/** @defgroup PDL_Macros
  @{
*/
/***********************************************************************************************************************
                                    VENDOR ID & AUTOSAR VERSION INFO
***********************************************************************************************************************/
/** Vendor ID (vendorId) of the dedicated implementation of this module according to the AUTOSAR vendor list. */
#define PDL_TMR_IRQ_VENDOR_ID                              0x00C1U
/** Major version number of AUTOSAR release on which the appropriate implementation is based on. */
#define PDL_TMR_IRQ_AR_RELEASE_MAJOR_VERSION               0x04U
/** Minor version number of AUTOSAR release on which the appropriate implementation is based on. */
#define PDL_TMR_IRQ_AR_RELEASE_MINOR_VERSION               0x04U
/** Revision version number of AUTOSAR release on which the appropriate implementation is based on. */
#define PDL_TMR_IRQ_AR_RELEASE_REVISION_VERSION            0x00U
/** Major version number of the vendor specific implementation of the module. The numbering is vendor specific. */ 
#define PDL_TMR_IRQ_SW_MAJOR_VERSION                       0x01U
/** Minor version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define PDL_TMR_IRQ_SW_MINOR_VERSION                       0x00U
/** Patch level version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define PDL_TMR_IRQ_SW_PATCH_VERSION                       0x00U
/**@} end of group PDL_Macros */
/**********************************************************************************************************************
                                             GLOBAL VARIABLE
***********************************************************************************************************************/
/** @defgroup PDL_Variable
  @{
*/
#define PDL_START_SEC_CONST_UNSPECIFIED
#include "Pdl_MemMap.h"

/** The base address array of the timer */
CONST(uint32, GPT_CONST) TMR_BASEADDR_ARR[9] = {
    0            ,
    TMR1_BASEADDR,
    TMR2_BASEADDR,
    TMR3_BASEADDR,
    TMR4_BASEADDR,
    0            ,
    TMR6_BASEADDR,
    TMR7_BASEADDR,
    TMR8_BASEADDR
};
#define PDL_STOP_SEC_CONST_UNSPECIFIED
#include "Pdl_MemMap.h"
/**@} end of group PDL_Variable */
/**********************************************************************************************************************
                                                GLOBAL FUNCTION
***********************************************************************************************************************/
/** @defgroup PDL_Fuctions
  @{
*/
#define PDL_START_SEC_CODE
#include "Pdl_MemMap.h"

void TMR1_BRK_UP_TRG_COM_IRQHandler(void);
void TMR1_CC_IRQHandler(void);
void TMR2_IRQHandler(void);
void TMR3_IRQHandler(void);
void TMR4_IRQHandler(void);
void TMR6_IRQHandler(void);
void TMR7_IRQHandler(void);
void TMR8_IRQHandler(void);

void TMR1_BRK_UP_TRG_COM_IRQHandler(void)
{
#ifdef ICU_TMR1_ISR_ENABLE
#if (STD_OFF == ICU_TMR_CUSTOM_FEATURE_ENABLE)
    Icu_Tmr_Tmr1ProcessOfInterrupt(ICU_TMR1);
#else
    Icu_Tmr_CustomFunctionOvfIrq(ICU_TMR1);
#endif
#endif

#if defined(PWM_TMR1_ISR_ENABLE) && \
    ((STD_ON == PWM_OVERFLOW_CHECK_SUPPORTED) || (STD_ON == PWM_FAULT_CHECK_SUPPORTED))
    Pwm_Tmr1_ProcessTofAndFaultInterrupt(PWM_TMR1);
#endif
}

void TMR1_CC_IRQHandler(void)
{
#ifdef GPT_TMR1_ISR_ENABLE
    Gpt_Tmr_ProcessInterrupt(GPT_TMR1);
#endif

#ifdef ICU_TMR1_ISR_ENABLE
#if (STD_OFF == ICU_TMR_CUSTOM_FEATURE_ENABLE)
    Icu_Tmr_ProcessInterrupt(ICU_TMR1);
#else
    Icu_Tmr_CustomFunctionIrq(ICU_TMR1);
#endif
#endif

#ifdef OCU_TMR1_ISR_ENABLE
    Ocu_Tmr_ProcessInterrupt(OCU_TMR1);
#endif

#if defined(PWM_TMR1_ISR_ENABLE) && (STD_ON == PWM_NOTIFICATION_SUPPORTED)
    Pwm_Tmr_ProcessCommonInterrupt(PWM_TMR1);
#endif
}

void TMR2_IRQHandler(void)
{
#ifdef GPT_TMR2_ISR_ENABLE
    Gpt_Tmr_ProcessInterrupt(GPT_TMR2);
#endif

#ifdef ICU_TMR2_ISR_ENABLE
#if (STD_OFF == ICU_TMR_CUSTOM_FEATURE_ENABLE)
    Icu_Tmr_ProcessInterrupt(ICU_TMR2);
#else
    Icu_Tmr_CustomFunctionIrq(ICU_TMR2);
#endif
#endif

#ifdef OCU_TMR2_ISR_ENABLE
    Ocu_Tmr_ProcessInterrupt(OCU_TMR2);
#endif

#if defined(PWM_TMR2_ISR_ENABLE) && \
    ((STD_ON == PWM_NOTIFICATION_SUPPORTED) || (STD_ON == PWM_OVERFLOW_CHECK_SUPPORTED))
    Pwm_Tmr_ProcessCommonInterrupt(PWM_TMR2);
#endif
}

void TMR3_IRQHandler(void)
{
#ifdef GPT_TMR3_ISR_ENABLE
    Gpt_Tmr_ProcessInterrupt(GPT_TMR3);
#endif

#ifdef ICU_TMR3_ISR_ENABLE
#if (STD_OFF == ICU_TMR_CUSTOM_FEATURE_ENABLE)
    Icu_Tmr_ProcessInterrupt(ICU_TMR3);
#else
    Icu_Tmr_CustomFunctionIrq(ICU_TMR3);
#endif
#endif

#ifdef OCU_TMR3_ISR_ENABLE
    Ocu_Tmr_ProcessInterrupt(OCU_TMR3);
#endif

#if defined(PWM_TMR3_ISR_ENABLE) && \
    ((STD_ON == PWM_NOTIFICATION_SUPPORTED) || (STD_ON == PWM_OVERFLOW_CHECK_SUPPORTED))
    Pwm_Tmr_ProcessCommonInterrupt(PWM_TMR3);
#endif
}

void TMR4_IRQHandler(void)
{
#ifdef GPT_TMR4_ISR_ENABLE
    Gpt_Tmr_ProcessInterrupt(GPT_TMR4);
#endif

#ifdef ICU_TMR4_ISR_ENABLE
#if (STD_OFF == ICU_TMR_CUSTOM_FEATURE_ENABLE)
    Icu_Tmr_ProcessInterrupt(ICU_TMR4);
#else
    Icu_Tmr_CustomFunctionIrq(ICU_TMR4);
#endif
#endif

#ifdef OCU_TMR4_ISR_ENABLE
    Ocu_Tmr_ProcessInterrupt(OCU_TMR4);
#endif

#if defined(PWM_TMR4_ISR_ENABLE) && \
    ((STD_ON == PWM_NOTIFICATION_SUPPORTED) || (STD_ON == PWM_OVERFLOW_CHECK_SUPPORTED))
    Pwm_Tmr_ProcessCommonInterrupt(PWM_TMR4);
#endif
}

void TMR6_IRQHandler(void)
{
#ifdef GPT_TMR6_ISR_ENABLE
    Gpt_Tmr_BasicTmrProcessInterrupt(GPT_TMR6);
#endif
}

void TMR7_IRQHandler(void)
{
#ifdef GPT_TMR7_ISR_ENABLE
    Gpt_Tmr_BasicTmrProcessInterrupt(GPT_TMR7);
#endif
}

void TMR8_IRQHandler(void)
{
#ifdef GPT_TMR8_ISR_ENABLE
    Gpt_Tmr_BasicTmrProcessInterrupt(GPT_TMR8);
#endif
}

#define PDL_STOP_SEC_CODE
#include "Pdl_MemMap.h"

/**@} end of group PDL_Fuctions */
#ifdef __cplusplus
}
#endif  /* ifdef __cplusplus */
/**@} end of group PDL_Driver */
/**@} end of group G32A10xx_StdPeriphDriver */

