/*!
* @file     StdRegMacros.h
*
* @version  1.0.0
*
* @brief    Macros to access the registers
*
* @attention
*
* Project Name      : AUTOSAR MCAL
*
* Platform          : Arm
*
* Autosar Standard  : Classic Platform 4.4.0
*
* Compiled Version  : G32A10xx_MCAL_1_0_0_01-Otc-25
*
* Copyright (C) 2026 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (Geehy Semiconductor Software License Agreement).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the Geehy Semiconductor Software License Agreement for the governing permissions
* and limitations under the License.
*/

/*
* MISRA-C:2012 compliance checks
*
*
*     StdRegMacros_h_MISRA_REF1
*          Breaks the Dir 4.9 of MISRA 2012 guidelines,A function should be used 
*          in preference to a function-like macro where they are interchangeable.
*
*     StdRegMacros_h_MISRA_REF2
*         Breaks the required Dir-1.1-C90 of MISRA 2012 guidelines,
*         Any implementation-defined behaviour on which the output of the program depends shall be documented and understood.
*/

#ifndef STD_REG_MACROS_H
#define STD_REG_MACROS_H

#ifdef __cplusplus
extern "C"{
#endif

#include "Platform_Types.h"

/** @addtogroup G32A10xx_StdPeriphDriver
  @{
*/

/** @defgroup PLATFORM_Driver
  * @brief PLATFORM driver modules
  @{
*/

/** @defgroup PLATFORM_Macros
  @{
*/
/*******************************************************************************
                    VENDOR ID & AUTOSAR VERSION INFO
*******************************************************************************/
/** Vendor ID (vendorId) of the dedicated implementation of this module according to the AUTOSAR vendor list. */
#define STD_REG_MACROS_H_VENDOR_ID                       0x00C1U
/** Major version number of AUTOSAR release on which the appropriate implementation is based on. */
#define STD_REG_MACROS_H_AR_RELEASE_MAJOR_VERSION        0x04U
/** Minor version number of AUTOSAR release on which the appropriate implementation is based on. */
#define STD_REG_MACROS_H_AR_RELEASE_MINOR_VERSION        0x04U
/** Revision version number of AUTOSAR release on which the appropriate implementation is based on. */
#define STD_REG_MACROS_H_AR_RELEASE_REVISION_VERSION     0x00U
/** Major version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define STD_REG_MACROS_H_SW_MAJOR_VERSION                0x01U
/** Minor version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define STD_REG_MACROS_H_SW_MINOR_VERSION                0x00U
/** Patch level version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define STD_REG_MACROS_H_SW_PATCH_VERSION                0x00U

/**@} end of group PLATFORM_Macros */

/**************************************************************************
                    VERSION INFOMATION VERIFICATION
**************************************************************************/
#ifdef ENABLE_INTERMODULE_MCAL_CHECK
    /* Make sure the AUTOSAR major version number is the same between StdRegMacros.h and Platform_Types.h */
    /*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (STD_REG_MACROS_H_AR_RELEASE_MAJOR_VERSION != PLATFORM_TYPES_H_AR_RELEASE_MAJOR_VERSION)
        #error "AUTOSAR Major Version Number mismatch between StdRegMacros.h and Platform_Types.h"
    #endif
    /* Make sure the AUTOSAR minor version number is the same between StdRegMacros.h and Platform_Types.h */
    /*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (STD_REG_MACROS_H_AR_RELEASE_MINOR_VERSION != PLATFORM_TYPES_H_AR_RELEASE_MINOR_VERSION)
        #error "AUTOSAR Minor Version Number mismatch between StdRegMacros.h and Platform_Types.h"
    #endif
#endif

/**************************************************************************
                    MACRO DEFINITION
**************************************************************************/
/** @defgroup PLATFORM_Macros
  @{
*/

/** 8-bits memory read */
#define REG_READ8(address)                (*(volatile uint8*)(address))
#define REG_WRITE8(address, value)        ((*(volatile uint8*)(address)) = (value))
/** 8-bits getting */
#define REG_BIT_GET8(address, mask)       ((*(volatile uint8*)(address)) & (mask))
/** 8-bits setting */
#define REG_BIT_SET8(address, mask)       ((*(volatile uint8*)(address)) |= (mask))
/** 8-bits clearing */
#define REG_BIT_CLEAR8(address, mask)     ((*(volatile uint8*)(address)) &= (~(mask)))
/** 8-bits indexed memory read. Index i must have the data type uint32. */
#define REG_AREAD8(address, i)            (REG_READ8((address) + (i)))
/** 8-bits indexed memory write. Index i must have the data type uint32. */
#define REG_AWRITE8(address, i, value)    (REG_WRITE8((address) + (i), (value)))
/**
* 8-bits clear bits and set with new value. Note that it is user's responsibility
* to make sure that the value has only "mask" bits set: (value & ~mask) == 0
*/
#define REG_RMW8(address, mask, value)    (REG_WRITE8((address), ((REG_READ8(address) & ((uint8)~(mask))) | (value))))

/** 16-bits memory read */
#define REG_READ16(address)                (*(volatile uint16*)(address))
/** 16-bits memory write */
#define REG_WRITE16(address, value)        ((*(volatile uint16*)(address)) = (value))
/** 16-bits getting */
#define REG_BIT_GET16(address, mask)       ((*(volatile uint16*)(address)) & (mask))
/** 16-bits setting */
#define REG_BIT_SET16(address, mask)       ((*(volatile uint16*)(address)) |= (mask))
/** 16-bits clearing */
#define REG_BIT_CLEAR16(address, mask)     ((*(volatile uint16*)(address)) &= (~(mask)))
/** 16-bits indexed memory read. Index i must have the data type uint32. */
#define REG_AREAD16(address, i)            (REG_READ16((address) + ((uint32)((i) << 1U))))
/** 16-bits indexed memory write. Index i must have the data type uint32. */
#define REG_AWRITE16(address, i, value)    (REG_WRITE16((address) + ((uint32)((i) << 1U)), (value)))
/**
* 16-bits clear bits and set with new value. Note that it is user's responsibility
* to make sure that the value has only "mask" bits set: (value & ~mask) == 0
*/
#define REG_RMW16(address, mask, value)    (REG_WRITE16((address), ((REG_READ16(address) & ((uint16)~(mask))) | (value))))

/** 32-bits memory read */
#if !defined(REG_READ32)
/*** @warning StdRegMacros_h_MISRA_REF1 Some uses of this function-like macro look like they could be replaced by equivalent function calls. */
#define REG_READ32(address)                (*(volatile uint32*)(address))
#endif
/** 32-bits memory write */
#if !defined(REG_WRITE32) 
#define REG_WRITE32(address, value)        ((*(volatile uint32*)(address)) = (value))
#endif
/** 32-bits getting */
#define REG_BIT_GET32(address, mask)       ((*(volatile uint32*)(address)) & (mask))
/** 32-bits setting */
#if !defined(REG_BIT_SET32)
#define REG_BIT_SET32(address, mask)       ((*(volatile uint32*)(address)) |= (mask))
#endif
/** 32-bits clearing */
#if !defined(REG_BIT_CLEAR32)
#define REG_BIT_CLEAR32(address, mask)     ((*(volatile uint32*)(address)) &= (~(mask)))
#endif
/** 32-bits indexed memory read. Index i must have the data type uint32. */
#define REG_AREAD32(address, i)            (REG_READ32((address) + ((uint32)((i) << 2U))))
/** 32-bits indexed memory write. Index i must have the data type uint32. */
#define REG_AWRITE32(address, i, value)    (REG_WRITE32((address) + ((uint32)((i) << 2U)), (value)))

#if !defined(REG_RMW32)
/**
* 32-bits clear bits and set with new value. Note that it is user's responsibility
* to make sure that the value has only "mask" bits set: (value & ~mask) == 0
*/
#define REG_RMW32(address, mask, value)     \
       (REG_WRITE32((address), ((REG_READ32(address) & ((uint32)~((uint32)(mask)))) | ((uint32)(value)))))
#endif

/*******************************************************************************
                                BIT MASKS
*******************************************************************************/
#ifndef BIT0
    #define BIT0 ((uint32)0x00000001UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT0 != 0x00000001UL)
        #error "BIT0 value is not 0x00000001UL"
    #endif
#endif

#ifndef BIT1
    #define BIT1 ((uint32)0x00000002UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT1 != 0x00000002UL)
        #error "BIT1 value is not 0x00000002UL"
    #endif
#endif

#ifndef BIT2
    #define BIT2 ((uint32)0x00000004UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT2 != 0x00000004UL)
        #error "BIT2 value is not 0x00000004UL"
    #endif
#endif

#ifndef BIT3
    #define BIT3 ((uint32)0x00000008UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT3 != 0x00000008UL)
        #error "BIT3 value is not 0x00000008UL"
    #endif
#endif

#ifndef BIT4
    #define BIT4 ((uint32)0x00000010UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT4 != 0x00000010UL)
        #error "BIT4 value is not 0x00000010UL"
    #endif
#endif

#ifndef BIT5
    #define BIT5 ((uint32)0x00000020UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT5 != 0x00000020UL)
        #error "BIT5 value is not 0x00000020UL"
    #endif
#endif

#ifndef BIT6
    #define BIT6 ((uint32)0x00000040UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT6 != 0x00000040UL)
        #error "BIT6 value is not 0x00000040UL"
    #endif
#endif

#ifndef BIT7
    #define BIT7 ((uint32)0x00000080UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT7 != 0x00000080UL)
        #error "BIT7 value is not 0x00000080UL"
    #endif
#endif

#ifndef BIT8
    #define BIT8 ((uint32)0x00000100UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT8 != 0x00000100UL)
        #error "BIT8 value is not 0x00000100UL"
    #endif
#endif

#ifndef BIT9
    #define BIT9 ((uint32)0x00000200UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT9 != 0x00000200UL)
        #error "BIT9 value is not 0x00000200UL"
    #endif
#endif

#ifndef BIT10
    #define BIT10 ((uint32)0x00000400UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT10 != 0x00000400UL)
        #error "BIT10 value is not 0x00000400UL"
    #endif
#endif

#ifndef BIT11
    #define BIT11 ((uint32)0x00000800UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT11 != 0x00000800UL)
        #error "BIT11 value is not 0x00000800UL"
    #endif
#endif

#ifndef BIT12
    #define BIT12 ((uint32)0x00001000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT12 != 0x00001000UL)
        #error "BIT12 value is not 0x00001000UL"
    #endif
#endif

#ifndef BIT13
    #define BIT13 ((uint32)0x00002000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT13 != 0x00002000UL)
        #error "BIT13 value is not 0x00002000UL"
    #endif
#endif

#ifndef BIT14
    #define BIT14 ((uint32)0x00004000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT14 != 0x00004000UL)
        #error "BIT14 value is not 0x00004000UL"
    #endif
#endif

#ifndef BIT15
    #define BIT15 ((uint32)0x00008000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT15 != 0x00008000UL)
        #error "BIT15 value is not 0x00008000UL"
    #endif
#endif

#ifndef BIT16
    #define BIT16 ((uint32)0x00010000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT16 != 0x00010000UL)
        #error "BIT16 value is not 0x00010000UL"
    #endif
#endif

#ifndef BIT17
    #define BIT17 ((uint32)0x00020000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT17 != 0x00020000UL)
        #error "BIT17 value is not 0x00020000UL"
    #endif
#endif

#ifndef BIT18
    #define BIT18 ((uint32)0x00040000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT18 != 0x00040000UL)
        #error "BIT18 value is not 0x00040000UL"
    #endif
#endif

#ifndef BIT19
    #define BIT19 ((uint32)0x00080000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT19 != 0x00080000UL)
        #error "BIT19 value is not 0x00080000UL"
    #endif
#endif

#ifndef BIT20
    #define BIT20 ((uint32)0x00100000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT20 != 0x00100000UL)
        #error "BIT20 value is not 0x00100000UL"
    #endif
#endif

#ifndef BIT21
    #define BIT21 ((uint32)0x00200000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT21 != 0x00200000UL)
        #error "BIT21 value is not 0x00200000UL"
    #endif
#endif

#ifndef BIT22
    #define BIT22 ((uint32)0x00400000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT22 != 0x00400000UL)
        #error "BIT22 value is not 0x00400000UL"
    #endif
#endif

#ifndef BIT23
    #define BIT23 ((uint32)0x00800000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT23 != 0x00800000UL)
        #error "BIT23 value is not 0x00800000UL"
    #endif
#endif

#ifndef BIT24
    #define BIT24 ((uint32)0x01000000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT24 != 0x01000000UL)
        #error "BIT24 value is not 0x01000000UL"
    #endif
#endif

#ifndef BIT25
    #define BIT25 ((uint32)0x02000000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT25 != 0x02000000UL)
        #error "BIT25 value is not 0x02000000UL"
    #endif
#endif

#ifndef BIT26
    #define BIT26 ((uint32)0x04000000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT26 != 0x04000000UL)
        #error "BIT26 value is not 0x04000000UL"
    #endif
#endif

#ifndef BIT27
    #define BIT27 ((uint32)0x08000000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT27 != 0x08000000UL)
        #error "BIT27 value is not 0x08000000UL"
    #endif
#endif

#ifndef BIT28
    #define BIT28 ((uint32)0x10000000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT28 != 0x10000000UL)
        #error "BIT28 value is not 0x10000000UL"
    #endif
#endif

#ifndef BIT29
    #define BIT29 ((uint32)0x20000000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT29 != 0x20000000UL)
        #error "BIT29 value is not 0x20000000UL"
    #endif
#endif

#ifndef BIT30
    #define BIT30 ((uint32)0x40000000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT30 != 0x40000000UL)
        #error "BIT30 value is not 0x40000000UL"
    #endif
#endif

#ifndef BIT31
    #define BIT31 ((uint32)0x80000000UL)
#else
/*** @warning StdRegMacros_h_MISRA_REF2 [L] More than 8 levels of nested conditional inclusion - program does not conform strictly to ISO:C90. */
    #if (BIT31 != 0x80000000UL)
        #error "BIT31 value is not 0x80000000UL"
    #endif
#endif

/**@} end of group PLATFORM_Macros */

#ifdef __cplusplus
}
#endif

#endif

/**@} end of group PLATFORM_Driver */
/**@} end of group G32A10xx_StdPeriphDriver */
