/*!
* @file     Usart_Hw.c
*
* @version  1.0.0
*
* @brief    Usart Driver implementations
*
* @attention
*
* Project Name      : AUTOSAR MCAL
*
* Platform          : Arm
*
* Autosar Standard  : Classic Platform 4.4.0
*
* Compiled Version  : G32A10xx_MCAL_1_0_0_01-Otc-25
*
* Copyright (C) 2026 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (Geehy Semiconductor Software License Agreement).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the Geehy Semiconductor Software License Agreement for the governing permissions
* and limitations under the License.
*/

#ifdef __cplusplus
extern "C"{
#endif  /* ifdef __cplusplus */

#include "Std_Types.h"

#include "Mcu_RcmTypes.h"
#include "Mcu_RcmReg.h"

#include "CDD_Usart_Cfg.h"
#include "Usart_Reg.h"
#include "CDD_Usart.h"
#include "Usart_Hw.h"
	
/** @addtogroup G32A10xx_StdPeriphDriver
  @{
*/

/** @defgroup USART_Driver
  * @brief USART driver modules
  @{
*/

/** @defgroup USART_Macros
  @{
*/
/*******************************************************************************
                    VENDOR ID & AUTOSAR VERSION INFO
*******************************************************************************/
/** Vendor ID (vendorId) of the dedicated implementation of this module according to the AUTOSAR vendor list. */
#define USART_HW_VENDOR_ID                              0x00C1U
/** Major version number of AUTOSAR release on which the appropriate implementation is based on. */
#define USART_HW_AR_RELEASE_MAJOR_VERSION               0x04U
/** Minor version number of AUTOSAR release on which the appropriate implementation is based on. */
#define USART_HW_AR_RELEASE_MINOR_VERSION               0x04U
/** Revision version number of AUTOSAR release on which the appropriate implementation is based on. */
#define USART_HW_AR_RELEASE_REVISION_VERSION            0x00U
/** Major version number of the vendor specific implementation of the module. The numbering is vendor specific. */ 
#define USART_HW_SW_MAJOR_VERSION                       0x01U
/** Minor version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define USART_HW_SW_MINOR_VERSION                       0x00U
/** Patch level version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define USART_HW_SW_PATCH_VERSION                       0x00U

/**@} end of group USART_Macros */
/*******************************************************************************
                            GLOBAL FUNCTIONS
*******************************************************************************/
/** @defgroup USART_Variable
  @{
*/

/** The base address array of the UART */
const uint32 USART_BASEADDR_ARR[2] = {
    USART1_BASEADDR,
    USART2_BASEADDR,
};

/**@} end of group USART_Variable */

/** @defgroup USART_Fuctions
  @{
*/

/*!
* @brief       Config the USART peripheral according to the specified parameters in the USART_InitStruct
*
* @param       usartId:  Select the the USART peripheral.
*                        It can be USART1/USART2.
*
* @param       configStruct    pointer to a Usart_ConfigType structure
*
*/
FUNC(void, USART_CODE) Usart_Hw_Config(Usart_UsartIdType usartId, const Usart_ConfigType * configStruct)
{
    uint32 temp = 0;
    uint32 fCLK = 0;
    uint32 intDiv = 0;
    uint32 fractionalDiv = 0;
    uint32 tempBitVal = 0;
    uint32 usartSel = 0;

    /** Disable USART */
    REG_BIT_CLEAR32(USART_CTRL1_REG_ADDR(usartId), USART_CTRL1_UEN_MASK);
  
    /* WLS, PCEN, TXEN, RXEN */
    temp = REG_READ32(USART_CTRL1_REG_ADDR(usartId));
  
    temp &= (uint32)0xE9F3;
    temp |= (uint32)configStruct->mode | \
            (uint32)configStruct->parity | \
            (uint32)configStruct->wordLength;
    
    REG_WRITE32(USART_CTRL1_REG_ADDR(usartId),temp);
    
    REG_BIT_SET32(USART_CTRL1_REG_ADDR(usartId),USART_CTRL1_USWMEN_MASK);

    /* STOP bits */
    temp = REG_READ32(USART_CTRL2_REG_ADDR(usartId));
  
    temp &= (uint32)0xCFFF;
    temp |= (uint32)configStruct->stopBits;
    
    REG_WRITE32(USART_CTRL2_REG_ADDR(usartId),temp);

    /* Hardware Flow Control */
    temp = REG_READ32(USART_CTRL3_REG_ADDR(usartId));
    
    temp &= (uint32)0xFCFF;
    temp |= (uint32)configStruct->hardwareFlowCtrl;
    
    REG_WRITE32(USART_CTRL3_REG_ADDR(usartId),temp);
    
    
    if (usartId == USART1_ID)
    {
        usartSel = (REG_READ32(RCM_CFG3_REG_ADDR) & RCM_CFG3_USART1SEL_MASK) >> 
                     RCM_CFG3_USART1SEL_SHIFT;
    }
    else
    {
        usartSel = (REG_READ32(RCM_CFG3_REG_ADDR) & RCM_CFG3_USART2SEL_MASK) >> 
                     RCM_CFG3_USART2SEL_SHIFT;
    }
    switch (usartSel)
    {
        case 0x00U:
            fCLK = Mcu_Rcm_ReadPCLKFreq();
            break;
        case 0x01U:
            fCLK = Mcu_Rcm_ReadSYSCLKFreq();
            break;
        case 0x03U:
            fCLK = HSI_VALUE;
            break;
        default:
            /* nothing */
            break;
    }
    
    /* Compute the integer part */
    tempBitVal = REG_BIT_GET32(USART_CTRL1_REG_ADDR(usartId),USART_CTRL1_OSMCFG_MASK);
    if (tempBitVal != (uint32)RESET) /*!< Oversampling by 8 */
    {
        intDiv = (((uint32)25 * fCLK) / ((uint32)2 * (uint32)(configStruct->baudRate)));
    }
    /* Oversampling by 16 */
    else
    {
        intDiv = (((uint32)25 * fCLK) / ((uint32)4 * (uint32)(configStruct->baudRate)));
    }

    temp = (intDiv / (uint32)100) << (uint32)4;
    fractionalDiv = intDiv - ((uint32)100 * (temp >> (uint32)4));

    /* Implement the fractional part in the register */
    tempBitVal = REG_BIT_GET32(USART_CTRL1_REG_ADDR(usartId),USART_CTRL1_OSMCFG_MASK);
    if (tempBitVal != (uint32)RESET) /*!< Oversampling by 8 */
    {
        temp |= ((((fractionalDiv * (uint32)8) + (uint32)50) / (uint32)100)) & ((uint8)0x07);
    }
     /* Oversampling by 16 */
    else
    {
        temp |= ((((fractionalDiv * (uint32)16) + (uint32)50) / (uint32)100)) & ((uint8)0x0F);
    }

    REG_WRITE32(USART_BR_REG_ADDR(usartId),temp);
    if (USART_USE_DMA == configStruct->transferType)
    {
        Usart_Hw_OperationDma(usartId,USART_DMA_REQUEST_RX,ENABLE);
        Usart_Hw_OperationDma(usartId,USART_DMA_REQUEST_TX,ENABLE);
    }
    else
    {
        /* nothing */
    }
}


/*!
* @brief       Enables or disables the USART peripheral
* 
* @param       usartId   USART peripheral identifier
* @param       status    Enable state (ENABLE/DISABLE)
* 
* @note        Controls the USART enable bit (UEN) in CTRL1 register:
*              - ENABLE: Powers on the USART interface
*              - DISABLE: Powers down the USART to save power
*/
FUNC(void, USART_CODE) Usart_Hw_Operation(Usart_UsartIdType usartId, uint32 status)
{
    if ((uint32)ENABLE == status)
    {
        REG_BIT_SET32(USART_CTRL1_REG_ADDR(usartId),USART_CTRL1_UEN_MASK);
    }
    else if (((uint32)DISABLE == status))
    {
        REG_BIT_CLEAR32(USART_CTRL1_REG_ADDR(usartId),USART_CTRL1_UEN_MASK);
    }
    else
    {
        /* nothing */
    }
}


/*!
* @brief       Configures USART data direction mode
* 
* @param       usartId   USART peripheral identifier
* @param       mode      Direction mode (RX/TX/TX_RX)
* @param       status    Enable state
* 
* @note        Controls transmitter/receiver enable bits in CTRL1 register:
*              - RX: Enables receiver only
*              - TX: Enables transmitter only
*              - TX_RX: Enables both transmitter and receiver
*
*/
FUNC(void, USART_CODE) Usart_Hw_OperationDirectionMode(Usart_UsartIdType usartId, Usart_DirectionType mode, uint32 status)
{
    if ((uint32)ENABLE == status)
    {
        switch (mode)
        {
            case USART_MODE_RX:
                REG_BIT_SET32(USART_CTRL1_REG_ADDR(usartId), USART_CTRL1_RXEN_MASK);
                break;

            case USART_MODE_TX:
                REG_BIT_SET32(USART_CTRL1_REG_ADDR(usartId), USART_CTRL1_TXEN_MASK);
                break;

            case USART_MODE_TX_RX:
                REG_BIT_SET32(USART_CTRL1_REG_ADDR(usartId),
                              (USART_CTRL1_RXEN_MASK | USART_CTRL1_TXEN_MASK));
                break;

            default:
                /* nothing */
                break;
        }
    }
    else if ((uint32)DISABLE == status)
    {
        switch (mode)
        {
            case USART_MODE_RX:
                REG_BIT_CLEAR32(USART_CTRL1_REG_ADDR(usartId), USART_CTRL1_RXEN_MASK);
                break;

            case USART_MODE_TX:
                REG_BIT_CLEAR32(USART_CTRL1_REG_ADDR(usartId), USART_CTRL1_TXEN_MASK);
                break;

            case USART_MODE_TX_RX:
                REG_BIT_CLEAR32(USART_CTRL1_REG_ADDR(usartId),
                              (USART_CTRL1_RXEN_MASK | USART_CTRL1_TXEN_MASK));
                break;

            default:
                /* nothing */
                break;
        }
    }
    else
    {
        /* nothing */
    }
}

/*!
* @brief       Transmit Data
*
* @param       usartId:  Select the the USART peripheral.
*                        It can be USART1/USART2.
*
* @param       data:   Specifies the Transmits data value
*
* @retval      None
*
* @note        The value must less than 0x01FF
*/
FUNC(void, USART_CODE) Usart_Hw_TxData(Usart_UsartIdType usartId, const uint8 * data)
{
    uint16 tempData = 0;
    Usart_StateType const * tempStates = &g_lpuartStatus[usartId];
    const uint8 * dataPtr = data;
  
        
    if (g_lpuartStatus[usartId].parity != USART_PARITY_NONE)
    {
        if (tempStates->wordLength == USART_WORD_LEN_9B)
        {
            REG_WRITE32(USART_TXDATA_REG_ADDR(usartId), ((uint32) * dataPtr & (uint32)0x000000FF));
        }
        else if (tempStates->wordLength == USART_WORD_LEN_8B)
        {
            REG_WRITE32(USART_TXDATA_REG_ADDR(usartId), ((uint32) * dataPtr & (uint32)0x000000EF));
        }
        else
        {
            /* nothing */
        }
    }
    else
    {
        if (tempStates->wordLength == USART_WORD_LEN_9B)
        {
            tempData = (uint16)(* dataPtr);
            dataPtr++;
            tempData = tempData | ((uint16)(* dataPtr) << 8);
          
            REG_WRITE32(USART_TXDATA_REG_ADDR(usartId), ((uint32)tempData & (uint32)0x000001FF));
        }
        else if (tempStates->wordLength == USART_WORD_LEN_8B)
        {
            REG_WRITE32(USART_TXDATA_REG_ADDR(usartId), ((uint32) * dataPtr & (uint32)0x000000FF));
        }
        else
        {
            /* nothing */
        }
    }
}


/*!
* @brief       Received Data
*
* @param       usartId:  Select the the USART peripheral.
*                        It can be USART1/USART2.
*
* @retval      Returns the received data value
*/
FUNC(uint16, USART_CODE) Usart_Hw_RxData(Usart_UsartIdType usartId)
{
    uint16 regVal = 0;
    regVal = (uint16)(REG_READ32(USART_RXDATA_REG_ADDR(usartId)) & (uint16)0x01FF);
    
    return regVal;
}

/*!
* @brief       Controls USART DMA request generation
* 
* @param       usartId    USART peripheral identifier
* @param       direction  DMA direction (RX/TX)
* @param       status     Enable state
* 
* @note        Manages DMA request enable bits in CTRL3 register:
*              - RX: Enables DMA requests for reception
*              - TX: Enables DMA requests for transmission
*
*/
FUNC(void, USART_CODE) Usart_Hw_OperationDma(Usart_UsartIdType usartId, Usart_DmaRequestType direction, uint32 status)
{
    if (USART_DMA_REQUEST_RX == direction)
    {
        if ((uint32)ENABLE == status)
        {
            REG_BIT_SET32(USART_CTRL3_REG_ADDR(usartId), USART_CTRL3_DMARXEN_MASK);
        }
        else
        {
            REG_BIT_CLEAR32(USART_CTRL3_REG_ADDR(usartId), USART_CTRL3_DMARXEN_MASK);
        }
    }
    else if (USART_DMA_REQUEST_TX == direction)
    {
        if ((uint32)ENABLE == status)
        {
            REG_BIT_SET32(USART_CTRL3_REG_ADDR(usartId), USART_CTRL3_DMATXEN_MASK);
        }
        else
        {
            REG_BIT_CLEAR32(USART_CTRL3_REG_ADDR(usartId), USART_CTRL3_DMATXEN_MASK);
        }
    }
    else
    {
        /* nothing */
    }
}

/*!
* @brief       Configures DMA reception error behavior
* 
* @param       usartId   USART peripheral identifier
* @param       error     Error handling mode (ENABLE/DISABLE)
* 
* @note        Controls DMA reception error disable bit (DDISRXEEN):
*              - DISABLE: DMA stops on framing/parity/noise errors
*              - ENABLE: DMA continues transfer despite errors
*
*/
FUNC(void, USART_CODE) Usart_Hw_ConfigDMAReceptionError(Usart_UsartIdType usartId, Usart_DmaRxerrType error)
{
    if (USART_DMA_RXERR_DISABLE == error)
    {
        REG_BIT_SET32(USART_CTRL3_REG_ADDR(usartId),USART_CTRL3_DDISRXEEN_MASK);
    }
    else if ((USART_DMA_RXERR_ENABLE == error))
    {
        REG_BIT_CLEAR32(USART_CTRL3_REG_ADDR(usartId),USART_CTRL3_DDISRXEEN_MASK);
    }
    else
    {
        /* nothing */
    }
}


/*!
* @brief       Enables/disables USART interrupts
* 
* @param       usartId     USART peripheral identifier
* @param       interrupt   Interrupt type
* @param       status      Enable state
* 
* @note        Manages interrupt enable bits across CTRL1/CTRL3 registers:
*              - ERRIE/CTSIE: Located in CTRL3 register
*              - Other interrupts: Located in CTRL1 register
*
*/
FUNC(void, USART_CODE) Usart_Hw_OperationInterrupt(Usart_UsartIdType usartId, Usart_IntType interrupt, uint32 status)
{
    if ((uint32)ENABLE == status)
    {
        if (((uint32)interrupt == (uint32)USART_INT_ERRIE) || ((uint32)interrupt == (uint32)USART_INT_CTSIE))
        {
            REG_BIT_SET32(USART_CTRL3_REG_ADDR(usartId),(uint32)interrupt);
        }
        else
        {
            REG_BIT_SET32(USART_CTRL1_REG_ADDR(usartId),(uint32)interrupt);
        }
    }
    else if ((uint32)DISABLE == status)
    {
        if (((uint32)interrupt == (uint32)USART_INT_ERRIE) || ((uint32)interrupt == (uint32)USART_INT_CTSIE))
        {
            REG_BIT_CLEAR32(USART_CTRL3_REG_ADDR(usartId),(uint32)interrupt);
        }
        else
        {
            REG_BIT_CLEAR32(USART_CTRL1_REG_ADDR(usartId),(uint32)interrupt);
        }
    }
    else
    {
        /* nothing */
    }
}


/*!
* @brief       Reads USART status flags
* 
* @param       usartId   USART peripheral identifier
* @param       flag      Status flag to read
* 
* @return      Flag status (SET/RESET)
* 
* @note        Directly reads status register (STS) flags
*
*/
FUNC(uint8, USART_CODE) Usart_Hw_ReadStatusFlag(Usart_UsartIdType usartId, Usart_FlagType flag)
{
    uint8 tempVal = RESET;
    
    if ((REG_READ32(USART_STS_REG_ADDR(usartId)) & (uint32)flag) != (uint32)RESET)
    {
        tempVal = SET;
    }
    else
    {
        tempVal = RESET;
    }

    return tempVal;
}


/*!
* @brief       Clears USART status flags
* 
* @param       usartId   USART peripheral identifier
* @param       flag      Flag(s) to clear
* 
* @note        Writes to interrupt flag clear register (INTFCLR)
*
*/
FUNC(void, USART_CODE) Usart_Hw_ClearStatusFlag(Usart_UsartIdType usartId, uint32 flag)
{
    REG_WRITE32(USART_INTFCLR_REG_ADDR(usartId),flag);
}


/*!
* @brief       Reads active interrupt flags
* 
* @param       usartId   USART peripheral identifier
* @param       flag      Interrupt flag to check
* 
* @return      Interrupt status (SET/RESET)
* 
* @note        Checks both interrupt enable state and flag status:
*              1. Verifies interrupt is enabled
*              2. Checks if flag is set
*
*/
FUNC(uint8, USART_CODE) Usart_Hw_ReadIntFlag(Usart_UsartIdType usartId, Usart_IntFlagType flag)
{
    uint32 intEnable = 0;
    uint32 intFlag = 0;
    uint8 tempVal = RESET;

    if ((uint32)0 != ((uint32)flag & (uint32)0x0E))
    {
        intEnable = REG_BIT_GET32(USART_CTRL3_REG_ADDR(usartId),USART_CTRL3_ERRIEN_MASK);
        intFlag = REG_READ32(USART_STS_REG_ADDR(usartId)) & (uint32)flag;
    }
    else if ((uint32)0 != ((uint32)flag & (uint32)0xF0))
    {
        intEnable = REG_READ32(USART_CTRL1_REG_ADDR(usartId)) & (uint32)flag;
        intFlag = REG_READ32(USART_STS_REG_ADDR(usartId)) & (uint32)flag;
    }
    else if ((uint32)0 != ((uint32)flag & (uint32)0x01))
    {
        intEnable = REG_BIT_GET32(USART_CTRL1_REG_ADDR(usartId),USART_CTRL1_PEIEN_MASK) >> USART_CTRL1_PEIEN_SHIFT;
        intFlag = REG_BIT_GET32(USART_STS_REG_ADDR(usartId),USART_STS_PEFLG_MASK);
    }
    else if ((uint32)0 != ((uint32)flag & (uint32)0x200))
    {
        intEnable = REG_BIT_GET32(USART_CTRL3_REG_ADDR(usartId),USART_CTRL3_CTSIEN_MASK) >> USART_CTRL3_CTSIEN_SHIFT;
        intFlag = REG_BIT_GET32(USART_STS_REG_ADDR(usartId),USART_STS_CTSFLG_MASK) >> USART_STS_CTSFLG_SHIFT;
    }
    else if ((uint32)0 != ((uint32)flag & (uint32)0x800))
    {
        intEnable = REG_BIT_GET32(USART_CTRL1_REG_ADDR(usartId),USART_CTRL1_RXTOIEN_MASK) >> USART_CTRL1_RXTOIEN_SHIFT;
        intFlag = REG_BIT_GET32(USART_STS_REG_ADDR(usartId),USART_STS_RXTOFLG_MASK) >> USART_STS_RXTOFLG_SHIFT;
    }
    else if ((uint32)0 != ((uint32)flag & (uint32)0x20000))
    {
        intEnable = REG_BIT_GET32(USART_CTRL1_REG_ADDR(usartId),USART_CTRL1_CMIEN_MASK) >> USART_CTRL1_CMIEN_SHIFT;
        intFlag = REG_BIT_GET32(USART_STS_REG_ADDR(usartId),USART_STS_CMFLG_MASK) >> USART_STS_CMFLG_SHIFT;
    }
    else
    {
        /* nothing */
    }

    if ((uint32)0 != ((uint32)intFlag & (uint32)intEnable))
    {
        tempVal = SET;
    }
    else
    {
        tempVal = RESET;
    }
    
    return tempVal;
}


/*!
* @brief       Clears interrupt flags
* 
* @param       usartId   USART peripheral identifier
* @param       flag      Flag(s) to clear
* 
* @note        Clears flags via interrupt flag clear register (INTFCLR)
*
*/
FUNC(void, USART_CODE) Usart_Hw_ClearIntFlag(Usart_UsartIdType usartId, uint32 flag)
{
    REG_BIT_SET32(USART_INTFCLR_REG_ADDR(usartId),flag);
}


/*!
* @brief       Gets USART enable state
* 
* @param       usartId   USART peripheral identifier
* 
* @return      TRUE if enabled, FALSE if disabled
* 
* @note        Reads USART enable bit (UEN) in CTRL1 register
*
*/
FUNC(boolean, USART_CODE) Usart_Hw_GetUsartState(Usart_UsartIdType usartId)
{
    uint32 tempVal = 0;
    boolean tempRet = FALSE;
    
    tempVal = REG_BIT_GET32(USART_CTRL1_REG_ADDR(usartId),(uint32)USART_CTRL1_UEN_MASK);
    
    if (tempVal == (uint32)1)
    {
        tempRet = TRUE;
    }
    else
    {
        tempRet = FALSE;
    }

    return tempRet;
}



FUNC(void, USART_CODE) Usart_Hw_OperationHalfDuplex(Usart_UsartIdType usartId, uint32 status)
{
    if ((uint32)status == (uint32)ENABLE)
    {
        REG_BIT_SET32(USART_CTRL3_REG_ADDR(usartId),(uint32)USART_CTRL3_HDEN_MASK);
    }
    else
    {
        REG_BIT_CLEAR32(USART_CTRL3_REG_ADDR(usartId),(uint32)USART_CTRL3_HDEN_MASK);
    }
}


FUNC(void, USART_CODE) Usart_Hw_OperationSynchronousMode(Usart_UsartIdType usartId, uint32 status)
{
    if ((uint32)status == (uint32)ENABLE)
    {
        REG_BIT_SET32(USART_CTRL2_REG_ADDR(usartId),(uint32)USART_CTRL2_CLKEN_MASK);
    }
    else
    {
        REG_BIT_CLEAR32(USART_CTRL2_REG_ADDR(usartId),(uint32)USART_CTRL2_CLKEN_MASK);
    }
}


FUNC(void, USART_CODE) Usart_Hw_OperationCPolHigh(Usart_UsartIdType usartId, Usart_ClockPolType enable)
{
    if (enable == USART_CPOL_HIGH)
    {
        REG_BIT_SET32(USART_CTRL2_REG_ADDR(usartId),(uint32)USART_CTRL2_CPOL_MASK);
    }
    else
    {
        REG_BIT_CLEAR32(USART_CTRL2_REG_ADDR(usartId),(uint32)USART_CTRL2_CPOL_MASK);
    }
}


FUNC(void, USART_CODE) Usart_Hw_OperationCPhaTwo(Usart_UsartIdType usartId, Usart_ClockPhaType edge2)
{
    if (edge2 == USART_CPHA_2EDGE)
    {
        REG_BIT_SET32(USART_CTRL2_REG_ADDR(usartId),(uint32)USART_CTRL2_CPHA_MASK);
    }
    else
    {
        REG_BIT_CLEAR32(USART_CTRL2_REG_ADDR(usartId),(uint32)USART_CTRL2_CPHA_MASK);
    }
}


FUNC(void, USART_CODE) Usart_Hw_OperationLastBitOutput(Usart_UsartIdType usartId, boolean status)
{
    if (status == TRUE)
    {
        REG_BIT_SET32(USART_CTRL2_REG_ADDR(usartId),(uint32)USART_CTRL2_LBCPOEN_MASK);
    }
    else
    {
        REG_BIT_CLEAR32(USART_CTRL2_REG_ADDR(usartId),(uint32)USART_CTRL2_LBCPOEN_MASK);
    }
}

/**@} end of group USART_Fuctions */

#ifdef __cplusplus
}
#endif  /* ifdef __cplusplus */

/**@} end of group USART_Driver */
/**@} end of group G32A10xx_StdPeriphDriver */
