/*!
* @file     Mcu_PmuTypes.h
*
* @version  1.0.0
*
* @brief    Data Type Definition File for the MCU Module Based on PMU IP.
*
* @attention
*
* Project Name      : AUTOSAR MCAL
*
* Platform          : Arm
*
* Autosar Standard  : Classic Platform 4.4.0
*
* Compiled Version  : G32A10xx_MCAL_1_0_0_01-Otc-25
*
* Copyright (C) 2026 Geehy Semiconductor
*
* You may not use this file except in compliance with the
* GEEHY COPYRIGHT NOTICE (Geehy Semiconductor Software License Agreement).
*
* The program is only for reference, which is distributed in the hope
* that it will be usefull and instructional for customers to develop
* their software. Unless required by applicable law or agreed to in
* writing, the program is distributed on an "AS IS" BASIS, WITHOUT
* ANY WARRANTY OR CONDITIONS OF ANY KIND, either express or implied.
* See the Geehy Semiconductor Software License Agreement for the governing permissions
* and limitations under the License.
*/

#ifndef MCU_PMUTYPES_H
#define MCU_PMUTYPES_H

#ifdef __cplusplus
extern "C"{
#endif

#include "StdRegMacros.h"
#include "Compiler_Cfg.h"
#include "Compiler.h"

/** @addtogroup G32A10xx_StdPeriphDriver
  @{
*/

/** @addtogroup MCU_Driver
  @{
*/

/** @defgroup MCU_Macros
  @{
*/
/*******************************************************************************
                        VENDOR ID & AUTOSAR VERSION INFO
*******************************************************************************/
/** Vendor ID (vendorId) of the dedicated implementation of this module according to the AUTOSAR vendor list. */
#define MCU_PMU_TYPES_H_VENDOR_ID                       0x00C1U
/** Major version number of AUTOSAR release on which the appropriate implementation is based on. */
#define MCU_PMU_TYPES_H_AR_RELEASE_MAJOR_VERSION        0x04U
/** Minor version number of AUTOSAR release on which the appropriate implementation is based on. */
#define MCU_PMU_TYPES_H_AR_RELEASE_MINOR_VERSION        0x04U
/** Revision version number of AUTOSAR release on which the appropriate implementation is based on. */
#define MCU_PMU_TYPES_H_AR_RELEASE_REVISION_VERSION     0x00U
/** Major version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define MCU_PMU_TYPES_H_SW_MAJOR_VERSION                0x01U
/** Minor version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define MCU_PMU_TYPES_H_SW_MINOR_VERSION                0x00U
/** Patch level version number of the vendor specific implementation of the module. The numbering is vendor specific. */
#define MCU_PMU_TYPES_H_SW_PATCH_VERSION                0x00U

/**@} end of group MCU_Macros */
/*******************************************************************************
                            ENUMERATION DEFINITION
*******************************************************************************/
/** @defgroup MCU_Macros
  @{
*/

/** EINT_IMASK register address */
#define MCU_EINT_IMASK_REG_ADDR              ((uint32)(EINT_BASEADDR + (uint32)0x00U))

#define MCU_EINT_IMASK_MASK                  ((uint32)0x0FFFFFFFU)
#define MCU_EINT_IMASK_SHIFT                 ((uint8)0U)

#define MCU_EINT_IMASK_SET(BIT)              ((uint32)((uint32)1U << BIT))

/** EINT_EMASK register address */
#define MCU_EINT_EMASK_REG_ADDR              ((uint32)(EINT_BASEADDR + (uint32)0x04U))

#define MCU_EINT_EMASK_MASK                  ((uint32)0x0FFFFFFFU)
#define MCU_EINT_EMASK_SHIFT                 ((uint8)0U)

#define MCU_EINT_EMASK_SET(BIT)              ((uint32)((uint32)1U << BIT))

/** EINT_RTEN register address */
#define MCU_EINT_RTEN_REG_ADDR               ((uint32)(EINT_BASEADDR + (uint32)0x08U))

#define MCU_EINT_RTEN_MASK                   ((uint32)0x0001FFFFU)
#define MCU_EINT_RTEN_SHIFT                  ((uint8)0U)

#define MCU_EINT_RTEN_SET(BIT)               ((uint32)((uint32)1U << BIT))

/** EINT_FTEN register address */
#define MCU_EINT_FTEN_REG_ADDR               ((uint32)(EINT_BASEADDR + (uint32)0x0CU))

#define MCU_EINT_FTEN_MASK                   ((uint32)0x0001FFFFU)
#define MCU_EINT_FTEN_SHIFT                  ((uint8)0U)

#define MCU_EINT_FTEN_SET(BIT)               ((uint32)((uint32)1U << BIT))

/** EINT_SWINTE register address */
#define MCU_EINT_SWINTE_REG_ADDR             ((uint32)(EINT_BASEADDR + (uint32)0x10U))

#define MCU_EINT_SWINTE_MASK                 ((uint32)0x0001FFFFU)
#define MCU_EINT_SWINTE_SHIFT                ((uint8)0U)

#define MCU_EINT_SWINTE_SET(BIT)             ((uint32)((uint32)1U << BIT))

/** EINT_IPEND register address */
#define MCU_EINT_IPEND_REG_ADDR              ((uint32)(EINT_BASEADDR + (uint32)0x14U))

#define MCU_EINT_IPEND_MASK                  ((uint32)0x0001FFFFU)
#define MCU_EINT_IPEND_SHIFT                 ((uint8)0U)

#define MCU_EINT_IPEND_SET(BIT)              ((uint32)((uint32)1U << BIT))

#define MCU_EINT_PVD_MASK                    ((uint32)((uint32)1U << (uint32)16))

/**@} end of group MCU_Macros */

/** @defgroup MCU_Enumerations
  @{
*/

/**
* @brief   Sleep mode entry
*/
typedef enum
{
    PMU_SLEEPENTRY_WFI = 0x00,  //!< enter SLEEP mode with WFI instruction
    PMU_SLEEPENTRY_WFE = 0x01   //!< enter SLEEP mode with WFE instruction
} Mcu_Pmu_SleepEntryType;

/**
* @brief   Regulator state is Sleep/Stop mode
*/
typedef enum
{
    PMU_REGULATOR_ON       = 0x00,  //!< STOP mode with regulator ON
    PMU_REGULATOR_LowPower = 0x01   //!< STOP mode with regulator in low power mode
} Mcu_Pmu_RegulatorType;

/**
* @brief   Stop mode entry
*/
typedef enum
{
    PMU_STOPENTRY_WFI         = 0x00,  //!< Enter STOP mode with WFI instruction
    PMU_STOPENTRY_WFE         = 0x01,  //!< Enter STOP mode with WFE instruction
    PMU_STOPENTRY_SLEEPONEXIT = 0x02   //!< Enter STOP mode with SLEEPONEXIT instruction
} Mcu_Pmu_StopEntryType;

/**
* @brief   Flag
*/
typedef enum
{
    PMU_FLAG_WAKEUP     = 0x00,  //!< Wake Up flag
    PMU_FLAG_STANDBY    = 0x01,  //!< StandBy flag
    PMU_FLAG_PVDO       = 0x02   //!< Not for G32A1085 devices
} Mcu_Pmu_FlagType;


/**
* @brief   PVD level select
*/
typedef enum
{
    PVD_2_691V  = 0x01,
    PVD_3_005V  = 0x02,
    PVD_3_309V  = 0x03,
    PVD_3_608V  = 0x04,
    PVD_3_880V  = 0x05,
    PVD_4_197V  = 0x06,
    PVD_4_457V  = 0x07
} Mcu_Pmu_PVDSelectType;

/**@} end of group MCU_Enumerations */
/*******************************************************************************
                            STRUCT DEFINITION
*******************************************************************************/
/** @defgroup MCU_Structure
  @{
*/

typedef void (*Mcu_LvdNotifyFunctionType)(void);

/**
* @brief    The PMU configuration
*/
typedef struct
{
    uint32 rtcEnable;
    uint32 powerEnable;
    Mcu_Pmu_PVDSelectType pvdSelect;
    const Mcu_LvdNotifyFunctionType mcuLvdNotification;
    uint8 PVDHigh;
} Mcu_Pmu_CfgType;

/**@} end of group MCU_Structure */
/*******************************************************************************
                            FUNCTION DECLARATION
*******************************************************************************/
#define MCU_START_SEC_CODE
#include "Mcu_MemMap.h"

/** @defgroup MCU_Fuctions
  @{
*/

void Mcu_Pmu_OperationBackupAccess(uint32 status);
void Mcu_Pmu_OperationPowerVoltDetector(uint32 status);
void Mcu_Pmu_OperationPVDLevelSelect(Mcu_Pmu_PVDSelectType pvd, uint8 high);

/** Low Power modes configuration functions */
void Mcu_Pmu_EnterSleepMode(Mcu_Pmu_SleepEntryType entry);
void Mcu_Pmu_EnterStopMode(Mcu_Pmu_RegulatorType regulator, Mcu_Pmu_StopEntryType entry);
void Mcu_Pmu_EnterStandbyMode(void);

/** Flags management functions */
void Mcu_Pmu_ClearStatusFlag(Mcu_Pmu_FlagType flag);

/** Function used to set the PMU configuration to the default reset state */
FUNC(void, MCU_CODE) Mcu_Pmu_Init(const Mcu_Pmu_CfgType * PmuPtr);

FUNC(uint8, MCU_CODE) Mcu_Pmu_ReadPvdFlag(void);

FUNC(uint8, ICU_CODE) Mcu_Eint_ReadIntFlag(void);
FUNC(void, ICU_CODE)  Mcu_Eint_ClearIntFlag(void);

/**@} end of group MCU_Fuctions */

#define MCU_STOP_SEC_CODE
#include "Mcu_MemMap.h"

#ifdef __cplusplus
}
#endif

#endif /* MCU_PMU_TYPES_H */

/**@} end of group MCU_Driver */
/**@} end of group G32A10xx_StdPeriphDriver */
